Researchers make scalable arrays of ‘building blocks' ultrathin devices

Semiconductors, metals and insulators are needed to be integrated in order to make the transistors that are used in making of smartphones, computers and other devices that are microchip-enabled.

These days, transistors are very small, just 10 nanometers wide, and are generally made by three-dimensional crystals. However, a new technology uses two-dimensional crystals that are only 1 nanometer thick, to facilitate ultrathin electronics. Researchers throughout the world are analyzing 2D crystals made from regular layered materials to restrict electron transport within two dimensions.

It is for the first time that scientists at the Department of Energy’s Oak Ridge National Laboratory have made use of a new synthesis process and commercial electron-beam lithography techniques in order to create arrays of semiconductor junctions in random patterns within a nanometer-thick semiconductor crystal. As per reports, the process depends on changing patterned regions of one single-layer crystal into another.

As per MasoudMahjouri-Samani, who co-led the study with David Geohegan, it is possible to make any kind of pattern. Geohegan is the principal investigator of a Department of Energy basic science project and also head of ORNL’s Nanomaterials Synthesis and Functional Assembly Group at the Center for Nanophase Materials Sciences. The project concentrates on the growth mechanisms and controlled production of nanomaterials.

According to Geohegan, “The development of a scalable, easily implemented process to lithographically pattern and easily form lateral semiconducting heterojunctions within two-dimensional crystals fulfills a critical need for ‘building blocks’ to enable next-generation ultrathin devices for applications ranging from flexible consumer electronics to solar energy”.