Washington, September 10 : In a new research, scientists at Rice University have used industry-standard lithographic techniques to deposit 10-nanometer stripes of amorphous graphite onto silicon, which brings graphite’s potential as a mass data storage medium a step closer to reality.

The research, by James Tour and postdoctoral associate Alexander Sinitskii from Rice University, facilitates the creation of potentially very dense, very stable nonvolatile memory for all kinds of digital devices.

With backing from a major manufacturer of memory chips, Tour and his team have pushed the technology forward in several ways since a paper that appeared last November first described two-terminal graphitic memory.

While noting advances in other molecular computing techniques that involve nanotubes or quantum dots, Tour said none of those have yet proved practical in terms of fabrication.

Not so with this simple-to-deposit graphite.

“We’re using chemical vapor deposition and lithography - techniques the industry understands,” said Tour.

“That makes this a good alternative to our previous carbon-coated nanocable devices, which perform well but are very difficult to manufacture,” he added.

Graphite makes a good, reliable memory “bit” for reasons that aren’t yet fully understood.

The lab found that running a current through a 10-atom-thick layer of graphite creates a complete break in the circuit - literally, a gap in the strip a couple of nanometers wide.

Another jolt repairs the break.

The process appears to be indefinitely repeatable, which provides addressable ones and zeroes, just like today’s flash memory devices, but at a much denser scale.

Tour’s graphite-forming technique is well-suited for other applications in the semiconductor industry.

One result of the previous paper is a partnership between the Tour group and NuPGA (for “new programmable gate arrays”), a California company formed around the research to create a new breed of reprogrammable gate arrays that could make the design of all kinds of computer chips easier and cheaper.

The Tour lab and NuPGA, led by industry veteran Zvi Or-Bach, have applied for a patent based on vertical arrays of graphite embedded in “vias,” the holes in integrated circuits connecting the different layers of circuitry.

When current is applied to a graphite-filled via, the graphite alternately splits and repairs itself, just like it does in strip form.

Essentially, it becomes an “antifuse,” the basic element of one type of field programmable gate array (FPGA), best described as a blank computer chip that uses software to rewire the hardware. (ANI)